1. Technical Field
Embodiments of the present disclosure relate to semiconductor packages and methods of fabricating the same and, more particularly, to stack packages and methods of fabricating the same.
2. Related Art
In the electronics industry, small, thin and light semiconductor packages are increasingly in demand with the development of smaller, faster, multi-functional and higher performance portable electronic products. In general, the semiconductor package includes a single semiconductor chip. Recently, however, stack packages have been developed to realize high performance electronic systems. Each of the stack packages may include a plurality of semiconductor chips having different functions.
To fabricate the stack packages, through electrodes (in some cases, referred to as “through silicon vias”) penetrating each of the semiconductor chips may be formed and the semiconductor chips may be stacked such that the through electrodes of the semiconductor chips are vertically aligned with each other to electrically couple the semiconductor chips. In the event that the through electrodes are used in the semiconductor packages, a length of interconnection lines, for example, wires may be remarkably reduced to improve electrical characteristics of the semiconductor packages. Further, if the through electrodes are applied in the semiconductor packages, the semiconductor packages, for example, the stack packages may be formed to have a compact size.